Author : Mohamed Hassan Elmahlawy
CoAuthors : Sherif Anis, Mahmoud E. A. Gadallah, and Emad A. El-Samahy
Source : 16th International Conference on Aerospace Sciences and Aviation Technology, ASAT-16, Egypt, May 26-28, 2015.
Date of Publication : 05/2015
Abstract :
This paper presents a new parametric fault detection approach for analogue circuits based on the digital signature analysis. This approach has two main parts, an analogue test pattern generator (ATPG), and an analogue test response compactor (ATRC). The proper ATPG is designed to sweep the applying sinusoidal frequencies to match the frequency domain of the analogue circuit under test (ACUT). The output test response of the ACUT is acquired via the analogue-to-digital converter (ADC). The ATRC accumulates digital samples of the output response from the ADC to generate a digital signature that can characterize the situation of the ACUT. The signature comparison is achieved based on signature boundaries and the worst-case analysis. In addition, the signature curve for each component variations in the ACUT is presented. It combines effective parameters of the transfer function of the ACUT with respect to the component variations. These parameters are the band-width and the passband transmission. In this paper, the hardware implementation is achieved using the field programmable gate array (FPGA) technology as the digital part and the analogue part that includes the data conversion. The digital test controller is designed to enable the proper control and synchronization of the analogue test cycle for stable digital signature generation. The presented testing approach is applied to the ACUT in the range of biomedical applications to validate it. Based on the presented hardware implementation, the signature curve for each component of the ACUT is derived for the ACUT judgment.
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